Date: Jan 6, 2013 1:08 PM
Author: anyone
Subject: Re: simulink error

On Sun, 06 Jan 2013 14:17:08 +0000, kishan  wrote:

> hi all, while compiling my blok i get the following error >>> Cannot
> compile diagram 'Kyocera_205W' because it contains variable sample times
> or S-functions and is using a fixed-step solver. what to do ????


1. Don't implement the overall model with a fixed-step solver ('tautology', I know...)
2. Change the blocks/sub-blocks and S-functions to discrete

Have a look at Simulation -> Configuration Parameters -> Solver